Statistical Analysis and Optimization for VLSI

                              

Statistical Analysis and Optimization For VLSI: Timing and Power is a state-of-the-art book on the newly emerging field of statistical computer-aided design (CAD) tools. The very latest research in statistical timing and power analysis techniques is included, along with efforts to incorporate parametric yield as the key objective function during the design process. Included is the necessary mathematical background on techniques which find widespread use in current analysis and optimization. The emphasis is on algorithms, modeling approaches for process variability, and statistical techniques that are the cornerstone of the probabilistic CAD movement. The authors also describe recent optimization approaches to timing yield and contrast them to deterministic optimization. The work will enable new researchers in this area to come up to speed quickly, as well as provide a handy reference for those already working in CAD tool development.

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Theoretical Foundations of VLSI Design

                   

This book discusses recent research in the theoretical foundations of several subjects of importance for the design of hardware, and for computer science in general. The physical technologies of very large scale integration (VLSI) are having major effects on the electronic industry. The potential diversity and complexity of digital systems have begun a revolution in the technologies of digital design, involving the application of concepts and methods to do with algorithms and programming. In return, the problems of VLSI design have led to new subjects becoming of importance in computer science. Topics covered in this volume include: models of VLSI complexity; complexity theory; systolic algorithm design; specification theory; verification theory; design by stepwise refinement and transformations. A thorough literature survey with an exhaustive bibliography is also included. The book has grown from a workshop held at the Centre for Theoretical Computer Science at Leeds University and organised by the editors.

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VHDL primer 2014

 

CMOS and Integreted Circuits

 

VHDL programming 2013

VHDL programming 2013